FIG. 1 shows a block diagram of a generic wireless transceiver, in which a processing circuit 10, such as, for example, a digital signal processor (DSP), supplies a baseband (BB) transmitting signal TXBB.
The baseband transmitting signal TXBB is converted by a transmitter circuit 20 into a radio-frequency (RF) transmitting signal TXRF. For instance, typically the aforesaid transmitter circuit 20 comprises a modulator, such as for example a mixer or an analog multiplier, which modulates the signal TXBB with a high-frequency signal LO. In addition, the aforesaid transmitter circuit may also comprise filters, amplifiers, etc.
Finally, the transmitting signal TXRF is sent to at least one antenna 30.
In a complementary way, a radio-frequency receiving signal RXRF received via the antenna 30 is converted via a receiver circuit 40 into a baseband receiving signal RXBB. For instance, typically the aforesaid receiver circuit 40 comprises a demodulator, such as for example a mixer, which demodulates the signal RXRF using the frequency signal LO. Also the receiver circuit may comprise filters, amplifiers, etc.
For instance, the carrier signal LO may be supplied by an oscillator or synthesizer 50.
A particular architecture of the receiver 40 is the architecture of a so-called “low-IF” type.
Receivers with a low-IF architecture are commonly used in transceiver systems due to their relatively low complexity and robustness. Basically, in a low-IF receiver, the radio-frequency signal RXRF received is demodulated at a lower, non-zero, frequency, the so-called “intermediate frequency” (IF), which may typically range from hundreds of kilohertz to some megahertz. Consequently, the main characteristic of the aforesaid architecture consists in the fact that the radio-frequency signal RXRF received is converted by means of a system of a heterodyne type to a significantly lower frequency, hereinafter designated by fIF. In particular, the heterodyne system is implemented through a mixer that carries out multiplication of the radio-frequency signal by an ideally pure tone (LO) with frequency fLO, appropriately generated by the synthesizer 50 in such a way thatfIF=fRF−fLO  (1)
The high-frequency components generated by the multiplication can be subsequently filtered along the receiving chain.
The choice of the frequency fIF has a considerable effect on the design of the analog system in so far as, if it is sufficiently high, it enables reduction of the problems of flicker noise and DC offsets generated by the chain of receiver circuits. On the other hand, an excessive increase of the frequency fIF may lead to an increase of the power dissipation of the analog-to-digital converter (ADC) and also of the DSP in so far as it requires a higher working frequency.
Low-IF receivers normally use in-quadrature signals (i.e., of a complex-envelope type) both to facilitate demodulation thereof and to solve the problem of image rejection.
Consequently, as highlighted in FIG. 2, the low-IF receiver circuit 40 receives at input the radio-frequency receiving signal RXRF.
In the example considered, the aforesaid signal RXRF is amplified via an amplifier 402, such as for example a low-noise amplifier (LNA).
In particular, in the case where the receiver 40 supplies to the DSP 10 a complex signal, the amplified RF signal, i.e., the signal at output from the amplifier 402, is sent to two branches: a first branch for the in-phase (I) component and a branch for the quadrature (Q) component.
In this case, each branch comprises a demodulator 404, such as for example a mixer, which carries out multiplication of the radio-frequency signal by respective signals LOI and LOQ, and a filter 406, which, by filtering the high-frequency components, yields the evolution in time of the respective component I(t) and Q(t).
To interface the aforesaid signals with the processing circuit 10 respective analog-to-digital (A/D) converters 408 may be provided.
Reception of a complex signal calls for generation, upstream, of the in-quadrature signals LOI and LOQ, i.e., having a phase shift of 90° with respect to one another. Generation of the tones LOI and LOQ with controlled phase shift calls for an accurate design of the circuit 50 that will limit as far as possible the inevitable cumulatable phase errors.
The techniques normally employed envisage use of PLL-based synthesizers that contain an oscillator, such as for example a voltage-controlled oscillator (VCO) 502, and multiphase filters or frequency dividers 504. The latter approach, however, envisages generation of a tone by the synthesizer, the frequency of which should be at least twice the desired one. Against this disadvantage, the active division circuit enables introduction of techniques for control of the phase error that can compensate also for possible phase errors accumulated in the receiving chain.
A typical problem of the low-IF receiver consists in the so-called “image response or rejection”.
With reference to FIG. 3a, the aforesaid problem consists in the fact that a generic heterodyne system produces a frequency conversion both of the desired channel CHN, in this case at a frequency fCHN=fLO+fIF, and of its image IMG positioned at fIMG=fLO−fIF, which at this point cannot be rejected with a classic real analog filter, such as for example the filter 406, in so far as both of the channels are brought to the frequency fIF, since the aforesaid components CHN and IMG come to be superimposed during demodulation in the demodulators 404 (see FIG. 3b).
Selection of the channel CHN may in any case be made by means of complex-filtering techniques, which can be implemented in an analog or digital way and operate on the complex (in-quadrature) signal received by selecting the desired channel CHN from the image IMG and from other possible out-of-band interfering signals. The effectiveness of the complex filter in rejection of the image IMG is, however, markedly affected by the phase and amplitude mismatch or errors that accumulate on the in-quadrature signals at input, where the phase mismatch is defined as the deviation with respect to the 90° phase shift expected between the signals I and Q, and the amplitude mismatch is defined as the lack of amplitude correspondence between the signals I and Q.
In particular, FIG. 4 shows the typical relation for image rejection (IR) with respect to the phase mismatch, or “Phase Imbalance”, as appears on the horizontal axis, and the amplitude mismatch, or “Amplitude Imbalance”, as appears on the vertical axis. The relation that expresses the image rejection IR with respect to the phase mismatch φ and the amplitude mismatch δ may be expressed also via the following equation:
                    IR        =                  10          ⁢                                          ⁢          log          ⁢                                    1              +                              2                ⁢                                  (                                      1                    +                    δ                                    )                                ⁢                cos                ⁢                                                                  ⁢                φ                            +                                                (                                      1                    +                    δ                                    )                                2                                                    1              -                              2                ⁢                                  (                                      1                    +                    δ                                    )                                ⁢                cos                ⁢                                                                  ⁢                φ                            +                                                (                                      1                    +                    δ                                    )                                2                                                                        (        2        )            
Consequently, normally techniques of correction of the aforesaid errors (φ,δ→0) are introduced in such a way as to maximize the image rejection that can be obtained in accordance with the specifications of the system and with the effective selectivity of the complex filter.
For instance, the technique described in Li Yu, W. Martin Snelgrove, “A Novel Adaptive Mismatch Cancellation System for Quadrature IF Radio Receivers”, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: ANALOG AND DIGITAL SIGNAL PROCESSING, VOL. 46, NO. 6, JUNE 1999 (incorporated by reference), is one of the most widespread techniques because it operates digitally on the complex signal received, producing a simultaneous correction of amplitude and phase mismatch prior to filtering of the image.
Alternatively, the technique described in Oscar Steila, “Automatic In-phase Quadrature Balancing AIQB”, October 2006 (Rev C: 7/10/2012) (copy located at URL http://www.qsl.net/iklxpv), incorporated by reference, may be used, where a mismatch compensation is made by correlating appropriately different harmonic contributions of the signal received. This approach calls, however, for an operation of fast Fourier transform (FFT), which is typically more burdensome from the computational standpoint.
In both of the above cases, the calibration signals may coincide with the signal received in operating conditions provided that the analog-to-digital conversion of the aforesaid signals is adequately performed by the purposely provided A/D converters (ADCs) both in terms of precision (number of bits) and of band (sampling frequency). In particular, the demand for high image rejections calls for analog-to-digital conversions that are very accurate in terms of precision, which tends to increase the number of bits and consequently the complexity and power consumption of the converter.
However, the increasing demand for low-consumption systems clashes with the need expressed previously of producing high-performance ADC circuits, which in general prove particularly burdensome from the consumption standpoint and frequently force the digital circuitry to operate at higher sampling frequencies, thus weighing even more heavily on the power budget.
Optimization of the circuits and appropriate distribution of the functions linked to selection of the channel CHN within the low-IF architecture may, however, contribute significantly to the reduction of the overall consumption of the system, reducing in particular the performance required of the ADC and the digital circuitry.
In this sense, the architecture proposed in FIG. 5 contemplates the presence of a complex filter 412 of an analog type upstream of the A/D conversion. The complex filter 412 is ideally able to select the desired channel CHN from any other interfering channel (including the image IMG), intrinsically limiting the band requirement and the resolution of the ADC and hence also the consumption of the processing unit 10.
Elimination of the image channel IMG moreover enables for some specific modulation formats demodulation of the channel received without necessarily having a complex signal, and consequently it is possible to eliminate also one of the two A/D converters 408.
Against the advantages set forth there remains open the problem of correction of the phase and amplitude errors at input to the complex filter 412, since in the presence of the aforesaid filter and of just one A/D converter of limited performance it is not possible to use the techniques proposed by Li Yu and Oscar Steila.
In the presence of the complex analog filter 412 and of just one A/D converter 408, it is necessary to make the correction of possible phase and amplitude errors in analog form using adequate circuit techniques. The amplitude errors may, for example, be compensated for by adding on each branch a respective amplifier with configurable amplification coefficient 410, for instance between the filter 406 and the filter 412. Instead, as regards the phase, it is possible to compensate for the errors by acting appropriately on the frequency dividers present within the I/Q generator, for example on the circuit 504.
There also exist different approaches that envisage making the correction of both of the errors by acting only on the I/Q components received at IF frequency prior to block 412.